One of the most rapidly advancing technlogies at the present time, electronics, is centered around semiconductors, particularly integrated circuits. According to present practices, semiconductors are mass-produced and installed in highly sophisticated, complex and costly equipment. As with many mass-produced products, semiconductors are prone to failure, in many cases within the first few thousand hours of operation. The complexity of the equipment within which such semiconductors are installed makes such post-installation failures highly undesirable. For example, when equipment reaches the final inspection stage of production before semiconductor failures are detected, the high level skills required for testing and repair add a significant cost to production expenses. Even more significantly, when the product is in the field and a service technician must make warranty repairs, the costs incurred can have a marked effect on profitability. As a result, manufacturers of electronic equipment are demanding ever greater quality and dependability in commercial grade semiconductors.
Such quality and dependability are enhanced substantially by detection of those semiconductors likely to fail in the first few hours of operation prior to installation of such semiconductors in electronic equipment. One of the most effective methods of making such a detection is referred to as "burn-in." According to burn-in techniques, semiconductors are stressed within their physical and electrical limits prior to installation so that those semiconductors likely to become early failures in completed equipment can be uncovered. More particularly, burn-in procedures of the prior art involve removably mounting a large number of semiconductors on one or more printed circuit boards having semiconductor sockets thereon ("component boards"); placing such component boards with the semiconductors mounted thereon in a chamber whose environment, particularly temperature, is controllable; applying dc biases to each semiconductor on each board in such a manner as to reverse, and sometimes forward, bias as many of such semiconductor's junctions as possible, and/or actively clocking each semiconductor, and/or loading the outputs of each semiconductor to maximum rated conditions, such application of dc biases, clocking signals and loads being accomplished substantially simultaneously to each semiconductor; removing the component boards from the chamber after the semiconductors have been subjected to the environmental condition of the chamber and the biases, clocking signals and loads for a designated period of time; and removing the semiconductors from the component boards. The semiconductors can then be electrically tested by applying a room temperature test of critical dc parameters, e.g., input currents and thresholds, output voltages and currents, and, in the case of digital components, by making a functional test to verify truth table performance. In this way, the semiconductors that fail during burn-in are detected and segregated from those that do not fail. Because the semiconductors that do not fail during the burn-in process have withstood substantial stress, such semiconductors possess a high degree of dependability and can be installed in highly complex equipment with confidence that such semiconductors will not fail prematurely.
A substantial portion of the total time and costs involved in prior art burn-in procedures is consumed in temporarily packaging the semiconductors so that the semiconductors can be placed in the controlled environment while various electrical signals are applied to the terminals of such semiconductors. For example, the costs of the printed circuit boards and the semiconductor sockets are high. Furthermore, such boards and sockets deteriorate at an accelerated rate due to the extreme conditions of the controlled environment and must be replaced on a regular basis. In addition, in order to avoid damage to the semiconductor terminals, the semiconductors are mounted on and removed from the component boards by hand. Such a manual process, in particular mounting the semiconductors, is a tedious procedure to which substantial time and labor must be devoted. It has been found, for example, that it takes approximately one minute to load six integrated circuit devices onto a component board. As a result of the costs of such prior art temporary packaging techniques, the total cost of burn-in has been substantially inflated.